A13-OLinuXino board routing progress


Image

We decided to re-format the PCB in standard Nano-ITX form factor 120×120 mm.
The high speed DDR3 memory part is completely routed now, the board will be 4 layers, so generally most of the work is done.
Now the peripherials have to be routed and next week we may be ready for prototype PCB run.

46 Comments (+add yours?)

  1. Brian
    Jul 04, 2012 @ 18:04:11

    Looking good. Thanks for the update.
    Just for interest, any plans for a mini/micro version of the A13-OLinuXino board in the future?

    Reply

  2. zoobab
    Jul 04, 2012 @ 18:42:07

    Would it hurt to add HDMI output and ethernet in the next version? A13 should have HDMI on chip, no?

    Reply

    • 0xFF
      Jul 06, 2012 @ 09:07:25

      A13 does not have HDMI, it seems you’ll have to wait for an A10 version, which should be even more popular than this one and will definitely crush the Raspberry Pi … until someone decides to do a similar board with a dual-core, then a quad-core, or use a cell-phone CPU so the board can support 3G or HSPA, then … then ….

      Reply

  3. erdogan
    Jul 04, 2012 @ 19:47:44

    My dream is; Debian, A13 and me :)
    We are waiting this board.

    Erdogan / TURKEY

    Reply

  4. erdogan
    Jul 04, 2012 @ 20:01:51

    New Project: A13 XL ;)
    hdmi, sd, Linux (debian, fedora … ) 2xEth0-1(firewall project), sound in- out,
    2xUsb, (opti. wifi)

    Reply

  5. sagt3k
    Jul 04, 2012 @ 20:03:12

    What will the price of this version of the board?

    Reply

  6. 0xFF
    Jul 04, 2012 @ 22:07:45

    Looks nice !! In 3 weeks, I will go and live in Shenzhen for 2 years, hopefully I can get the A13 at a good price. At this point of the routing do you confirm the board is 4 layers ? Is the DDR3 easy to route ? It seems the only real difficulty of this board…

    Reply

  7. 0xFF
    Jul 05, 2012 @ 11:13:41

    huh I see the answer to my questions, sorry for asking ;)

    Reply

  8. Pro Sentti
    Jul 05, 2012 @ 14:24:27

    No ethernet ?

    Reply

  9. giovanni.v
    Jul 05, 2012 @ 14:48:45

    Sorry, that’s really disappointing ;-)
    Why sacrificing a wired, true, reliable ethernet to wifi?

    Reply

  10. Pro Sentti
    Jul 05, 2012 @ 14:51:48

    Thanks for the info.

    Your project really took my attention. Can you give any estimations for the availability ?

    You guys should hype this product little a bit more ;) Nobody knows this project. RBi is getting hurt when this is out !

    Reply

    • OLIMEX Ltd
      Jul 05, 2012 @ 14:58:00

      it’s written about 10 times on this blog that A13-OLinuXino board is planned to be in production in September but each time I post about it I got at least 10 e-mails with this question and several posts on the blog message, why you guys do not read :) , I will disagree that “nobody” knows this project, the day 1 when I anounced the A13 board project started got about 6000 hits alone (about 600 reads every hour accourding to wordpress), the number of reads since then is about 100 000, so lot of people are aware that this board is coming and just wait patiently ;)

      Reply

  11. Pro Sentti
    Jul 05, 2012 @ 15:52:46

    How about the FAQ ? ;)

    Reply

  12. Pro Sentti
    Jul 05, 2012 @ 15:53:58

    I left a line about this project directly to the RBi’s message board. You should get 10x hits very soon ;)

    Reply

    • Pro Sentti
      Jul 05, 2012 @ 19:34:17

      EVERYBODY! Spread the link to this plog. Lets put this thing to FLY ! By the community advertising :)

      Reply

  13. jc
    Jul 07, 2012 @ 03:40:48

    Will there be NFC on this?

    Reply

  14. Nibu
    Sep 13, 2012 @ 14:31:40

    Hi Olimex
    This is an awesome project .The thing that make it more beautiful is that its open source . I am a circuit designer never had any experience in designing 4 layer PCB But i do 2 layer and all.
    I would like to design a simple board editing your PCB . Could you tell me which are the four layers and whats its color i got top as red and bottom as blue

    But i have a doubt for other two layers could you help me ?

    Reply

  15. Nibu
    Sep 17, 2012 @ 13:34:53

    hi can you please do help me by telling how to generate gerber files for this PCB layout

    Reply

  16. Nibu Alias
    Sep 21, 2012 @ 13:43:22

    I generated
    A13-OLinuXino_Rev_B.cmp
    A13-OLinuXino_Rev_B.drd
    A13-OLinuXino_Rev_B.drl
    A13-OLinuXino_Rev_B.plc
    A13-OLinuXino_Rev_B.sol
    A13-OLinuXino_Rev_B.stc
    A13-OLinuXino_Rev_B.sts

    using the tutorial link on olimex site . i hope these are the only gerber files for 4 layer board

    Am i correct or shall i missed anythng

    Reply

    • OLIMEX Ltd
      Sep 21, 2012 @ 13:50:39

      just send the Eagle files to your manufacturer, the tutorial on our web is for 2 layer Pcbs!

      Reply

      • Nibu Alias
        Sep 21, 2012 @ 14:15:41

        oh that means there is no need to edit excellon in eagle.def file . And regular procedure of generating 4 layer PCB . ya i would send eagle files to manufacturer but i wish i could learn that procedure that is why asked . Thank you :)

      • OLIMEX Ltd
        Sep 21, 2012 @ 14:33:06

        to generate the inner layers use same script as for the top/bottom layers, but select the inner2 and inner3
        it’s simple and straight forward, then check with gerber viewer what you generated and compare with the CAD files, that’s all folks :)

  17. Nibu Alias
    Sep 21, 2012 @ 14:35:12

    yeah i did it thanks a lot sir :)

    Reply

  18. Nibu
    Sep 22, 2012 @ 06:12:26

    my pcb manufacturer is asking me copper thickness too . what should be the ideal thickness of this board

    Reply

  19. Nibu
    Sep 26, 2012 @ 21:09:47

    i would like to buy A13 olinuxino boards in your site its written you will be able to supply A13 chips tooo….So is it possible for you to ship whole components for manufacturing A13 boards (atleast 5 boards )

    Reply

  20. Trackback: DDR Routing rules part 2: DDR3 | The Dude's Electrical Engineering blog
  21. mandi
    Nov 03, 2013 @ 15:23:27

    hi olimex
    i see your schematic for A13-OLinuXino and in tracks that is for u2 component (H5TQ2G83CFR-H9C) why nets that is for data (D8…..D15) is not respectively connected to DQ0 …. DQ7
    your connect is :
    DQ0 ———-> D15
    DQ1 ———-> D12
    DQ2 ———-> D13
    DQ3 ———-> D8
    DQ4 ———-> D11
    DQ5 ———-> D10
    DQ6 ———-> D9
    DQ7 ———-> D14
    shell it be like this ?????
    DQ0 ———-> D8
    DQ1 ———-> D9
    DQ2 ———-> D10
    DQ3 ———-> D11
    DQ4 ———-> D12
    DQ5 ———-> D13
    DQ6 ———-> D14
    DQ7 ———-> D15
    in ddr3 sdram u1 data pin is correct but in ddr3 sdram u2 confuse and data pin is unregular please help me

    Reply

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