Embedded World 2018 is next week in Nürnberg


Embedded World is next week in Nürnberg. It’s good place to see many semiconductor vendors at once.

This year is interesting to see Chinese companies like Espressif Systems and Rockchip to  exhibit there. I look forward to meet there face to face people I have communicated only by e-mail!

Some interesting booths I put in my “to visit” agenda:

  • Analog Devices GmbH 4A-629
  • Arm Limited 4-140
  • ASIX Electronics Corporation 3-310
  • ATMEL – Microchip Technology 1-500/510
  • Broadcom Limited 3A-135
  • Espressif Systems 3A-623
  • Intel Corporation 1-338
  • NXP 4A-220
  • ON Semiconductor 4A-260
  • Qualcomm 4A-330
  • Realtek 3-341
  • Samsung 3A-438
  • Silergy 2-458
  • Silicon Labs 4A-128
  • SIMCom 3-531
  • STMicroelectronics 4A-138
  • Xilinx 3-311

Olimex used to exhibit at Embedded World three years 2014-2016, but in 2017 and this year we are just visitors. The reason for this decision is that Messe Nürnberg obviously has so much work and can’t offer good service for the smallish exhibitors. They make agreements then break them whenever they want and bear no responsibility. In our case February 2016 we made booking for exhibiting in 2017, Messe Nürnberg offered us booth plan and we choose booth with good location. We made agreement and then in July 2016 someone offered them to pay more for the same location and they assign this booth to them and notified us to go whistle. They offered us to choose from what’s left not booked or we can break the deal and we will not PAY COMPENSATION to them! This really pissed me off enough to decide to not exhibit there anymore. For the three years while we were exhibiting it was always one and same story: we order booth and arrangement and when we go to the show we see that they did something different, we complain then they do last minutes updates to fix the problems… For me it was shock to see things like this in Germany, which everyone praise for punctuality and precision. First year I said to myself oh well things like this happen, second year I though ok we just have bad luck, but when the third year the situation didn’t improve I though something is not right.

Otherwise Electronica, Productronica, Embedded World are among the very small amount of still very active exhibitions in EU. All local electronics exhibitions in our Balkan area like the Fair in Plovdiv, Thessaloniki, Belgrade, Istanbul are with declining functionality. They used to be very important events where people learn about new products and can make contacts, now internet made them less useful.

Hello World! with Verilog on iCE40HX1K-EVB with open source tool IceStorm


One of the workshops at TuxCon 2016 included using Open Source Hardware FPGA board iCE40HX1K-EVB and there we went through the development process with FPGA and Verilog.

For those of you who were unable to attend, we will now show you what you’ve missed. First, see the previous post about how to setup FPGA FOSS IceStorm tools here.

Now that the tools are set, let’s learn some more about FPGA. This is a very brief introduction and it is far from comprehensive, but the Internet has tons of resources you can use to learn more.

We will go through most asked questions on the workshop only:

What is FPGA ?

FPGA stands for Field Programmable Gate Array. They are digital integrated circuits (ICs) that contain configurable (programmable) blocks of logic along with configurable interconnections between these blocks. Design engineers can configure, or program, such devices to perform a variety of tasks.

How many times can one FPGA be programmed?

Some FPGAs may only be programmed a single time (they are called OTP) while others may be reprogrammed over and over again. For development boards we need the latter because when we develop we often make mistakes and we need to be able to program FPGAs multiple times. The FPGAs which can be programmed many times usually have external non-volatile memory. It contains the configuration file which is read at power up to the local RAM inside FPGA, and is used to define the interconnections between the blocks inside FPGA. So when you apply power to these FPGA they need some small amount of time to read their program and then start working.

When are FPGA used in one design?

FPGAs allow many tasks to be performed in parallel at very high speed. They are also highly integrated (some FPGAs have millions of programmable blocks), so you can complete complex hardware designs in a very small space. The trade off is that FPGA are programmed differently than the micro controllers (as you will see later), so they require a little bit more studying in order to get used to them.
If you application requires high speed, and complex parallel tasks, you need FPGA. Typical applications are: digital signal processing as video and audio filtering, the FPGA outperform fastest DSPs in factor of 500. Another applications are developing new digital ICs like processors or microcontrollers  with new architectures and instructions. FPGA are used also for physical layer communications, decoding and encoding high speed communication lines like HDMI, SATA, USB.
There is no sense to use FPGA in slow processes which can be done by microcontrollers, but they can be used to add fast peripherals to them. For example if you need very fast SPI to capture some fast serial signal, most of microcontrollers have SPIs which work up to 20-30Mhz clock, with FPGA you can make SPI which work on 100 Mhz or 200Mhz or 300Mhz and to buffer the data then to re-transmit slowly to the microcontroller who to do something with this data.
You can synthesize almost any digital circuit with FPGA, to make your own microprocessor with custom number of registers and instruction set, most of the companies which design microprocessors / microcontrollers first test their ideas on FPGAs.

How FPGAs are programmed (configured)?

Back in 1984 when the first FPGAs were made, design flows used for CPLD was taken and they were programmed by drawing schematics of digital circuits, then the CAD tool synthesized the schematic to FPGA configuration files which you can load to the FPGAs. This approach works well, but when the FPGAs become with thousands of logic cells and the schematics become more than several pages long the process become prone to errors exponentially with the size of the schematic. (Just imagine to draw internal schematic on modern processor with digital logic and then to test it).
At the end 1980s move toward HDL (hardware description languages) was made. Visualizing, capturing, debugging, understanding, and maintaining a design at the gate level of abstraction became increasingly difficult and inefficient when juggling thousands gates.
The lowest level of abstraction for a digital HDL is switch level, which describe the circuit as a netlist of transistor switches.
A higher level of abstraction is the gate level,which describe the circuit as a netlist of primitive logic gates and functions.
The next level of HDL abstraction is the ability to support functional representations using Boolean equations.
The highest level of abstraction sported by traditional HDLs is known as behavioral, which describe the behavior of a circuit using abstract constructs like loops and processes similar to programming language.

Verilog and IceStorm

Verilog is one such HDL behavior language, another one very popular in Europe is VHDL, but as FOSS FPGA tool for iCE40 IceStorm has support for only Verilog we will make all next demos in Verilog :).

Let have look at the first Blink LED project we programmed on iCE40HX1K-EVB in the previous blog post. It’s available on GitHub.

The Makefile

This is configuration file for the project which tells how IceStorm to compile it:

    PROJ = example


this is project name, it could be any other name, IceStorm will search for example.v source file and the result at the end will be example.bin which you can program to iCE40HX1K-EVB

    PIN_DEF = ice40hx1k-evb.pcf


this is external file which assigns the signals we will use in the project to the physical chip pin numbers, if we open it will see:

    set_io CLK 15
    set_io BUT1 41
    set_io BUT2 42
    set_io LED1 40
    set_io LED2 51


which means the 100 Mhz Oscillator clock is connected to pin15, button1 to pin41, LED1 to pin40 and so on.

    DEVICE = hx1k


this tells IceStorm which device is used, in this case device from HX series with 1K logic blocks

    yosys -p 'synth_ice40 -top top -blif $@' $<


invokes yosys to syntheses example.v Verilog sources ‘top’ is the name of the top module you could assume it as something like main() in C language.

    arachne-pnr -d $(subst hx,,$(subst lp,,$(DEVICE))) -o $@ -p $^ -P vq100


after yosys has synthesized the sources ‘arachne-pnr’ try to place and route them physically inside the chip, you can imagine these logic cells are as matrix and this tool have to decide how to arrange them so to make smaller distances between the connected cells and physical pins, and design to work at maximal possible speed. Look at -P vq100 switch it tells arachne-pnr what package is used for the device in our case VQ100 chip package.

    icepack $< $@


packs the text file output generated by arachne-pnr to .bin file read to be programmed in FPGA external Flash memory

icetime -d $(DEVICE) -mtr $@ $<


The icetime program is an iCE40 timing analysis tool. It reads designs in IceStorm ASCII format and writes times timing netlists that can be used in external timing analysers. It also includes a simple topological timing analyser that can be used to create timing reports.

    sudo iceprogduino $<


small program which uses OLIMEXINO-32U4 (Arduino Leonardo) with custom firmware as programmer for the iCE40HX1K-EVB SPI Flash


    module top( //top module


this describes the ‘top’ module in the code which will be synthesised, it will use some physical signals defined in ice40hx1k-evb.pcf

then we define what are these signals inputs or outputs:

    input CLK;    //input 100Mhz clock
    input BUT1;   //input signal from button 1
    input BUT2;   //input signal from button 2
    output LED1;  //output signal to LED1
    output LED2;  //output signal to LED2


with the keyword ‘reg’ we define registers i.e. analog of variables in programming language, but here these are with default width of 1 bit, in the registers we can store and read signals

    reg BUT1_r;           //register to keep button 1 state
    reg BUT2_r;           //register to keep button 2 state
    reg LED1_m0_r;        //LED1 value in mode = 0
    reg LED2_m0_r;        //LED2 value in mode = 0
    reg LED1_m1_r;        //LED1 value in mode = 1
    reg LED2_m1_r;        //LED2 value in mode = 1
    reg [14:0] cntr;      // 15 bit counter for LED blink timing
    reg [14:0] rst_cnt=0; // 15 bit counter for button debounce
    reg mode=1;           //mode set to 1 initially
    reg [11:0] clk_div;   // 12 bit counter


you can see that cntr and rst_cntr are with [14:0] in front of them, this means they are 15 bit long registers, clk_div is 12 bit

with the keyword wire you define internal signals which are additional to these defined in the top module

    wire clk_24KHz; //signal with approx 24KHz clock
    wire reset;     //used for button debounce

the keyword assign makes connection between signals, so every time right side signal changes the same change occur at the left side signal

    assign reset = rst_cnt[14]; //reset signal is connected to bit15 of rst_cnt
    assign LED1 = mode ? LED1_m1_r : LED1_m0_r; //multiplexer controlled  
                      //by mode connects LED1_m1_r or LED1_m0_r to LED1
    assign LED2 = mode ? LED2_m1_r : LED2_m0_r; //multiplexer controlled  
                      //by mode connects LED2_m1_r or LED2_m0_r to LED2
    assign clk_24KHz = clk_div[11];      //100Mhz/4096= 24414 Hz


in this case 15th bit of rst_cnt register is connected to signal reset, signal clk_24KHz is connected to 12th bit of clk_div register
LED1 and LED2 are connected via multiplexers (made with ? keyword) with control signal mode to two registers with suffix ‘m1’ and ‘m0’
so when mode is 0 LED1 will be connected to LED1_m0_r register and when mode is 1 to LED1_m1_r

always block is executed every time when something in his sensitivity list changes:

    always @ (posedge CLK) begin      //on each positive edge of 100Mhz clock increment clk_div
       clk_div <= clk_div + 12'b1;


in this case every time positive edge of CLK is happen i.e. CLK change from 0 to 1 it’s executed and adds 1 to clk_div

next always block is a bit more complex:

  always @ (posedge clk_24KHz) begin //on each positive edge of 24414Hz clock
     BUT1_r <= BUT1;       //capture button 1 state to BUT1_r
     BUT2_r <= BUT2;       //capture button 2 state to BUT2_r
     cntr <= cntr + 15'd1; //increment cntr LED blink counter
  if(reset == 1'b0) begin //if bit15 of rst_cnt is not set yet
     rst_cnt <= rst_cnt + 15'd1; //increment the counter rst_cnt

  if(BUT1_r == 1'b0 && BUT2_r == 1'b0 && reset == 1'b1) begin 
       //if bit15 of rst_cnt is set and both buttons are pressed
    mode <= mode ^ 1'b1; //toggle the mode
    rst_cnt <= 15'd0; //clear debounce rst_cnt
  LED1_m0_r <= ~BUT1_r; //copy inv state of button 1 to LED1_m0_r
  LED2_m0_r <= ~BUT2_r; //copy inv state of button 2 to LED2_m0_r
  if(cntr == 15'd12207) begin //when 0.5s pass
    LED1_m1_r <= 1'b0; //reset LED1_m1_r
    LED2_m1_r <= 1'b1; //set LED2_m1_r

  if(cntr > 15'd24414) begin //when 1.0s pass
    cntr <= 15'd0; //clear cntr
    LED1_m1_r <= 1'b1; //set LED1_m1_r
    LED2_m1_r <= 1'b0; //reset LED2_m1_r

what happens here? every time at positive edge of clk_24KHz :
in BUT1_r and BUT2_r is loaded the current state of the buttons,
cntr is incremented with 1, this is our LED blink frequency counter
clk_24KHz is not actually exactly 24KHz but 100 000 000 Hz / 4096 = 24414 Hz or 24.414KHz 🙂

when this cntr reach value 12207 i.e. half second pass LED1_m1_r is loaded with 0 and LED2_m1_r is loaded with 1
when this cntr reach value 24414 i.e. one second pass LED1_m1_r is loaded with 1 and LED2_m1_r is loaded with 0
i.e. if mode is 1 the LED1 and LED2 will blink each half second.

when the mode is 0 LED1_m0_r and LED2_m0_r will follow button states i.e. in this mode when you press button 1LED1 will be on and when you release button 1 LED1 will be off
same will be for LED2 too

Now let pay some more attention to what this code describes:

   if(reset == 1'b0) begin //if bit15 of rst_cnt is not set yet
     rst_cnt <= rst_cnt + 15'd1; //increment the counter rst_cnt

   if(BUT1_r == 1'b0 && BUT2_r == 1'b0 && reset == 1'b1) begin 
           //if bit15 of rst_cnt is set and both buttons are pressed
     mode <= mode ^ 1'b1;  //toggle the mode
     rst_cnt <= 15'd0;    //clear debounce rst_cnt

reset is signal connected to rst_cnt 15th bit, so until this bit is set rst_cnt will be incremented on every positive edge of clk_24KHz,
when reset is set to 1 if BUT1 and BUT2 are pressed together the mode is toggled and res_cnt is set to 0 to ensure some debounce time

you can download the project and make and program with these two lines:


    make prog

You will see first LED1 and LED2 to blink as default mode is 1. If you want to toggle the mode press and hold BUT1 and BUT2 and release them quickly.

LED1 and LED2 will switch off, in this mode if you press BUT1 will switch on LED1 and if you press BUT2 will switch on LED2, if you press the both buttons together mode will change again to 1 and LED1 and LED2 will start blinking.

Your first program is done!

Now let see what will happen if we change line 48 from

   mode <= mode ^ 1'b1; //toggle the mode


   model <= mode ^ 1'b1; //toggle the mode

i.e. we made mistake and instead of mode wrote model what do you think will be there error message when synthesis is done?

You can try! Whaaaat? everything completes correctly and you get your example.bin ready for program. What happens when we run it? Right! The LED1 and LED2 blinks and you can’t change the mode by pressing BUT1 and BUT2 together anymore!

OMG how this happens? Welcome to the wonderful world of Verilog 🙂 If you do not define but use new signal Verilog silently creates it and just issue WARNING not error, in this case the warning is in the very beginning of the 1233 lines of messages you see printed while the source is synthesized:

    Parsing Verilog input from `example.v' to AST representation.
    Generating RTLIL representation for module `\top'.
    Warning: Identifier `\model' is implicitly declared at example.v:48.
    Successfully finished Verilog frontend.


This feature may make you bang your head to the wall searching for errors and can’t happen in VHDL, where everything have to be strictly defined before to be used.

VHDL vs Verilog is like old C vs Pascal choice. In C you can do lot of things to shoot yourself in the leg and the compiler will not stop you.


In the next FPGA blog post we will go deeper and will show you how to generate VGA video signals with iCE40HX1-EVB + iCE40-IO boards and how to move object on the screen with the arrow keys of PS2 keyboard.

And we will not stop here, we are preparing more tutorials with iCE40HX1-EVBiCE40-IO – video games Snake and Flappy bird. Then latter we will teach you how to build Digital Storage Oscilloscope with iCE40HX1-EVB + iCE40-IO+ iCE40-ADC , how to make Digital Logic Analyzer with  iCE40HX1-EVB +iCE40-DIO for sniffing protocols from devices operating from 1.65 to 5.5V levels and how to make DDS generator of signals with any forms using iCE40HX1-EVB + iCE40-DAC.


EDIT: As I wrote we learn this stuff too! Regarding the implicit declarations they may be disabled by adding on top of your code:

    `default_nettype none


I just try this and yosys stops with error when I mistype ‘mode’ with ‘model’:

Parsing Verilog input from `example.v' to AST representation.
Generating RTLIL representation for module `\top'.
ERROR: Identifier `\model' is implicitly declared at example.v:50 and `default_nettype is set to none.
Makefile:8: recipe for target 'example.blif' failed
make: *** [example.blif] Error 1

Embedded World 2016


Today is last day of Embedded World, really spectacular exhibition.

Lot of peoples from 9.00 to 18.00 on our booth and leg pain at the end of the day.

We are exhibiting our IoT platform and The DIY Laptop.


ST has interesting display on their booth showing how many STM32 devices they have sold and this display is interractive as the numbers go up every second, if this is real or just show it not so interesting, the number of 1.5 billion devices sold is impressive! And this is just one ARM vendor, I wonder what is the total number of all ARM devices sales.

NXP had interesting truck on their booth:


Lot of companies were exhibiting metal formed boxes, we already stolen few ideas to experiment with when we come back 😉 Time to learn LibreCAD for 2D drawing!

First PIC32-EMZ64 boards for Embedded World are now testing


This board was made from the design idea to mass production in just few weeks 🙂

The PIC32 microcontroller model was choosen January 21st, so we had 1 week to design and PCB layout the board, 1 week to produce the blank PCB, make stencils, prepare software demo code and one week to setup the assembly line and run the PCBs for asssembly.

Today we got first batch of the assembled boards.


For these who do not remember this board is using the new PIC32MZ2048EFH064 with 2MB of Flash, 512KB RAM, Ethernet, CAN and fast 18Msps 12bit ADC!

On the board you can see:

  • USB Host
  • Ethernet 100Mb
  • Audio input
  • Audio output
  • OLED LCD 128×64 pixels
  • microSD card
  • CAN driver
  • 3x buttons
  • Reset
  • LEDs

all this in compact credit card size format.

At Embedded World in Nurenberg 23-25 of February we will give away these boards but only to registered/approved developers. If you want to take your board at the show please send us e-mail and write what projects you have done, so we can confirm that your board is reserved. Important: we will not give away boards to Embedded world visitors who have no reservation/approval from us in advance.

You can’t visit Embedded World? Do not worry you still have chance to receive free board – just send us e-mail and tell us what projects you have done with PIC or Olimex boards before. We can decide to send you by post one of these free of charge.

Embedded World giveaway board update! Processor will have 2MB Flash, 512KB RAM and 2x CAN


After our blogging about the Embedded World giveaway board, there was short discussion / comments after the post that it would be great the PIC32 on the board to have more RAM and CAN and do you know what?

Microchip is reading this blog too 🙂 as today we got message that they decided to upgrade the processor for this board to PIC32MZ2048EFH064-I/PT which is with 2MB of Flash, 512KB of RAM and dual CAN!

Now you should have got idea why this company is expanding and grow so fast – they are flexible and their managers obviously have freedom to take prompt decision!

It took them less than 24 hours to react and change the processor on board so you guys will benefit from PIC32 which beside Ethernet also have dual CAN and x4 times more RAM and FLASH than what originally was planned!

We give away 1000 boards worth EUR 25000 on Embedded World 2016 – 23-25 of February in Nuremberg Germany – the biggest event in Europe for development boards and tools


Embedded World 2016 is as usually held in Nuremberg, Germany in February.

We are there exhibiting in hall 2, booth 2-651.

What we will show you there?

Our super duper new Internet of Things WiFi-PLUG, WiFi-SWITCH and WiFi-Dimmer, all of them based on ESP8266 and allowing easy to setup Home Automation. They work with mains power supply 85-240VAC 50/60Hz and are with small 40 x 35 x 12 mm so can fit inside existing power supply sockets.

Also we will show you our new BLE development boards and Bluetooth audio.

And of course there will be our Open Source DIY Laptop powered by A64-OLinuXino.

For these who remember several times we give away free boards on Embedded World.

This year will be no exeption. We are planning promotion together with Microchip and work on new board with their PIC32MZ0512EFE064-I/PT which will have these features:

– PIC32MZ running at 200 MHz/330 DMIPS, MIPS Warrior M-class core
– Flash 512KB
– RAM 128 KB
– 4x SPI 50Mbps, 4x I2C up to 1Mbps, I2S, 6x UARTS 25 Mbps
– temp sensor +-2C
– USB host HIGH Speed
– ADC 12bit, 24 channels, 18 Msps
– 9x PWM
– 10/100 Mb Ethernet
– OLED 128×64 pixels
– Analog input for microphone
– Analog output for headphones
– micro SD card
– industrial grade -25C+85C

This board will be add to our web shop after the show and will be priced at EUR 25.00 but note! On Embedded world we will give away free of charge 1000 of these worth EUR 25 000!

How you can get one?

Past experience show that people like to get freebies even if they have no use of them, small kids, 70 years old developers, all they came to our booth and ask for free boards, but we doubt they use the boards afterward which is pitty.

This board is quite good with industrial temperature specs, 18Msps ADCs, and fast UARTs, SPIs, I2Ss, so we really do not want these boards to go to someone who will have no use of them and just will let the board collect dust in the table corner, so if you want to get one of these boards send us to info@olimex.com email with link to web page with project you already have done with other Olimex boards.

Interesting projects and open source projects will have advantage, so please think twice before submitting your blink LED done with something :))).

We will confirm with email back that we have booked board for you which you can take on Embedded World.

If you have no ticket let us know we will generate free ticket for you as exhibitor we can do this, these tickets otherwise are expensive, so prepare yourself well 🙂

For these who do not have chance to come to Embedded World, but still have interesting project, if the project is interesting enough we can decide to cover shipping by post. The boards which will be shipped by post will be shipped after Embedded World i.e. about end of February.

The last date to send us link with your project is February 22nd.

We are at Embedded World H5-157 next week! Meet you there!



Embedded World – the biggest embedded technology event in Europe in next week. We are exhibiting in Hall 5 Booth H5-157.

You are welcome to pass our booth and see latest developments with ESP8266, RK3188, AM3352, and our other OLinuXino boards as well!


Embedded World 2015 is 26-28 of February in Nuremberg, Germany


Embedded World is the biggest European exhibition for development tools, boards, services for embedded market. This year the event will be from 24 to 26 of February.

We have small booth there in Hall 5 / 5-157 where we will show old and new boards and tools we have.

If you visit EW you are welcome to pass through our booth.

Embedded World 2014


Embedded World is biggest exhibition for development boards and tools.

This year we had small booth on it, and if you do wonder why your technical support questions got no answers last week, we were on Embedded World.

Here above are George and Lub on 25/02 in the early morning ready for the crowd which cames when the Exhibition is opened for visitors.

The show was really exhausting, thousands of people passed by our booth and for our surprise most of them (>95%) already knew for Olimex or used our boards, but just came to say “hi” or chat a bit about our new boards.


As expected the most of the interest was around the OLinuXino OSHW Linux computers:


We also show there the early prototypes of:

  • AM3352-SOM and EVB with two Ethernets, CAN, 4 USB hosts
  • A20-SOM + EVB with Gigabit Ethernet
  • A13-SOM + WiFi shield low cost IoT solution

Our plans were to return on 27/02 and to have the Friday Free Board Quiz and the Weekend Programming Challenge, but we fall in a bit of Adventure (damn Lufthansa! and returned back in Saturday 🙂 so I apologize we had to skip last week games.

Embedded World 2014 – Biggest event in Europe for Embedded Technology


Embedded World 2014 is approaching. This year it will be between February 25 and 27 as usual in Nuremberg Germany.

This year we have own small stand in Hall 5, where we will present what we did last year.

There of course will be free stuff and games but we will keep them in secret for now 😉

So if Embedded World is in your book do not forget to visit us in Hall 5 Stand 150.

Here is Hall5 plan:


And here is ZOOM of our Stand and our neighbors:


we will be next to Farnell (5-249), Fraunhofer (5-250) and the Hall bar area (5-248).

Embedded World have some entrance fee (about eur 15-20 IIRC) but we as exhibitor have some limited quantity free tickets for customers, so If you want to pass by our booth and need free ticket for Embedded send us e-mail.

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