FOSDEM 2016 was last weekend with lot of interesting meetings and talks!


FSDM

FOSDEM 2016 was last weekend in Bruxelles! Biggest event in EU this year had a bit less visitors, probably feared by the terrorist news which all TVs are exposing us.

Belgians seems to take this threat seriously as we have seen lot of peoples with automatic guns in military uniforms walking around the city center, but fortunately at FOSDEM we didn’t saw any, neither someone has stop us to check or whatsoever while we have been waling in the city.

Some 8000 different MACs were logged on WiFi infrastructure, so I guess at least 5000 visitors were there.

The picture above shows my captures from the event, buying t-shirt was my way to say thanks to these projects which we use daily both at home and office!

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You know you have been at FOSDEM Friday beer party when you wake up next morning and you see (hopefully not permanent) “IloveFS” tattoo on your arm. Here is how the Delirium beer hub was looking like at Friday:

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I had lecture about our experience designing A64 board with KiCAD, Riku Voipio took picture of the tail to enter the room and posted on G+

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The slides are posted at Slideshare. TL-DR; KiCAD now is solid enough to build complex designs, what we need is little bit of twist to make it even more easy to use and few minor bugs are to be wiped, but overal there is significant progress for one year!

To my surprise KiCAD team emailed me next day and we had a quick meeting with notes they took on all issues I mention on the talk! It’s nice to see such commitement to make the product better!

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Another interesting talk in same EDA room was from Clifford who reverse engineered the iCE40 bitstream and made completely FOSS FPGA toolset, which can be used to generate iCE40 based FPGA projects.

I had eye on iCE40 since Antti Lukats posted on Hackaday about his project, but we were quite busy with many other things to may play with it, now we start working on our own ICE40HX1K development board with UEXT for programming by OLinuXino and different extension connectors. The idea is to make entry level board for people who want to make their first steps in FPGA, running Clifford’s toolchain on OLinuXino with this FPGA board connected to it and with different front-end modules like high speed ADCs to make DSO or programmable level shifter 1.2-5.5V which to allow logic analyzer working on different voltage levels, LEDs, buzzers, counters, buttons with tons of examples. I already shoot Clifford e-mail about our plans and looking forward to hear his suggestions as he already have lot of experience with these FPGAs.

Clifford’s work sparkled such interest for iCE40 that now the Lattice demo boards are with 21 weeks delivery time, plenty of time for us to release our own board :))))

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Another interesting lecture was about the Rad1o badge for CCC. It was fun to learn for all the difficulties which the development team had to make these happen (including mistakes in the documentation which made them to drill back side of BGA PCB to disconnect solder ball) – they said they would never go through the manufacturing hell again as this production caused them gray hairs although the interest about this badge continues.

Being busy all day long with both design and manufacturing, once I made analogy about the path to design board and then to run this board in production -> it’s like the process to make kid and then to rise it, teach it, make it human being. First job (design) brings just fun, joy and satisfaction, the second is not less interesting but dealing with all manufacturing bugs and troubleshooting the processes is kinda routeen and sometimes even boring :))) but neverthless must be done! Sure we enjoy more designing than manufacturing, but can’t run sustainable business without latter.

2 Comments (+add yours?)

  1. Boris
    Feb 03, 2016 @ 00:12:03

    Looking forward to your iCE40 board.

    However, larger FPGA boards of yours would be very much appreciated, for instance one that could be used for Project Oberon 2013 (FPGA version). A problem has been the unvailability of FPGA boards that have the necessary fast SRAM with 32-bit wide device connection (Papilio DUO would have been a candidate but lacked that necessary bit width). The best option for this currently seem to be the recent Pepino boards from Saanlima Electronics, but they are only available from the US at comparatively high shipping costs, while it is unclear, whether customs offices will allow the EU import at all. And of course, it would be appropriate for Project Oberon to run on an OSHW board.

    In https://olimex.wordpress.com/2013/03/20/mod-lcd3310-example-with-olimexino-328-arduino-uno-written-in-ada-language/ you uttered regret about the disappearance of “these nice structured languages”, so this would be an opportunity for you to support their case. Hopefully not too long then before open source tools can generate bitstreams for Xilinx Spartan-6 FPGAs (or newer).

    Reply

  2. LinuxUser
    Feb 09, 2016 @ 17:25:57

    > Some 8000 different MACs were logged on WiFi infrastructure,
    > so I guess at least 5000 visitors were there.
    …or someone had fun running tools like aireplay in “active” mode, sending a plenty of random MACs over the air 🙂

    Reply

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