Allwinner’s A10 and A20 are they really pin-to-pin compatible and drop-in replacement


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Allwinner announced A20 processor as drop-in replacement for A10 designs, i.e. you could re-use your A10 board design for the new A20 processors which offer dual core power.

We already blogged that we got preliminary info and schematic to evaluate and last two days our developers were busy to compare the schematic info (as there is no datasheet for A20 yet).

Most of the GPIO ports on A20 match A10 ports, just some ports in A20 now have more functions but keep the old port functionality as well.

Well done Allwinner!

 

We spot some balls that are with differnt functionality though:

ball.A19   A20.TWI4_CLK   A10.GPS_MAG
ball.A20   A20.TWI3_CLK   A10.GPS_CLK
ball.B20   A20.TWI3_SDA   A10.GPS_SIGN

these three are minor changes, we do not use GPS signals on board and they go to GPIO connector so no problem

another difference is on these two balls:

ball.R14   A20.NC   A10.VREGIO_HDMI
ball.R16   A20.NC   A10.PLLREGIO

these two balls are left not connected on our A10 design too, so no problem

there are some differences in the PIO power supply:

ball.H10   A20 connected to 3V   A10 connected to 3.3V
ball.J10   A20 connected to 3V   A10 connected to 3.3V

these two balls are connected to 3V in A20 schematic and to 3.3V to A10 schematic, we have to investigate this further!

the major differences between A10 and A20 are in the DDR3 wiring:

ball.N3   A20.SCKE   A10.SCKE0
ball.J3   A20.SCK1#  A10.ODT1
ball.J4   A20.SCK1   A10.SCKE1
ball.AA4  A20.A15    A10.SCS1

A10 have two chip-select one clock and two clock enables (second is not used in our schematic) and addresses up to A14

A20 have one clock enable with two pairs of clocks (one not wired on the A20 reference schematic) and addresses up to A15

so both chips can address up to 2GB RAM but in different way.

We didn’t complete our A10 schematic this info comes right on time, so we can make our schematic compatible with both A10 and A20 and to may support up to 2GB RAM

Conclusion: YES, it’s possible to design board which to may work with both A10 and A20, but not if you have not received the A20 info when you made your A10 board :) 

13 Comments (+add yours?)

  1. Trackback: AllWinner A20 Linux Source Code, EVB Schematics and Product Brief
  2. Jon Smirl
    Apr 06, 2013 @ 17:12:58

    Did A10 officially support 2GB RAM? I know it works, but I’m not sure it was officially supported. Would you have been ok in a 1GB system?

    Reply

  3. Trackback: AllWinner A20: ecco i sorgenti Linux - Netbook News
  4. John
    Apr 10, 2013 @ 11:42:16

    What about sata, is it also on the A20 ?

    Reply

  5. Trackback: A20-OLinuXino DualCore Cortex-A7 prototypes work fine | olimex
  6. yspeed
    Jun 08, 2013 @ 15:35:25

    where can I find reference schematic and layout? which version of orcad tool I need to use to open it?

    Reply

  7. Vivien
    Jun 19, 2013 @ 18:06:11

    Hi,
    I don’t understand which change you had need to do because :
    ball.N3 A20.SCKE A10.SCKE0 // Nothing change, it’s the same thing, right ?
    ball.J3 A20.SCK1# A10.ODT1 // Unused on A10 and on A20
    ball.J4 A20.SCK1 A10.SCKE1 // Unused on A10 and on A20
    ball.AA4 A20.A15 A10.SCS1 // If you address up to A14 nothing change, right ?

    Vivien

    Reply

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