Open Source Hardware STMP1-OLinuXino-LIME2 industrial grade Linux computer update – Debian Buster and Ubuntu Focal with mainline Kernel 5.10.12 now supports almost everything


STMP1-OLinuXino-LIME2 Industrial grade Linux Computer project took us almost an year of work to build proper software support for our hardware with mainline uboot and kernel.

ST demo board uses Yocto with kernel 5.4, our images use Linux Kernel 5.10.12

These who monitor our Official images at https://images.olimex.com probably nottice that we already have images with Debian Buster and Ubuntu Focal for STM32MP1 where almost everything now work with mainline Linux Kernel 5.10.12.

  • We had lot of troubles around the Ethernet, but now it works pretty well!
  • CAN-FD – works!
  • Two USB High speed hosts with 1A current – works!
  • LCD – works
  • HDMI – works!
  • eMMC Flash boot – works!
  • PMU and LiPo charger battery support – works

Two things on this board left not complete:

  • low power modes
  • USB-OTG

New prototypes rev.B now are in production, the Chinese New Year will delay them to end of February. We hope meantime to solve these two last issues and run production.

UPDATE: As some people wanted to know what was the Ethernet issue we were struggling so long, I posted in the comment section.

For the USB-OTG my guess is that it’s also some silly issue so people may help:

STM32MP1 has two High speed USB hosts and one Full speed USB-OTG, here is snip from their Hardware development document:

Here is our schematic which follows above guide:

The two High Speed USB hosts work as expected, but the USB-OTG has issue summarized here: https://pastebin.com/i6G90kdg

What makes us a little bit suspicious is that STM in their own demo board didn’t follow their Hardware Guide and were wiring one of their High speed USB as OTG and connecting USB hub to the other, ignoring the Full speed USB at all.

16 Comments (+add yours?)

  1. jonassmedegaard
    Feb 04, 2021 @ 17:04:37

    That’s exciting news!

    Can you share how you solved the ethernet issue?

    Reply

    • SK
      Feb 04, 2021 @ 22:21:20

      +1 would be interesting to get to the bottom of that mystery (+ sharing with the community) 🙂

      Reply

    • OLIMEX Ltd
      Feb 05, 2021 @ 09:22:25

      Silly problem, and we were digging in wrong direction 🙂
      We spent all our efforts assuming there are some clock syncro issues for the Tx and Rx part of the PHY and were trying all possible delay/advance values in the PHY initialization registers. We use KZS9031 in many other boards and never had any issue, we wired it the same way to STM32MP1 and were really puzzled… then we RTFM and that actually STM32MP1 uses more signals including the interrupt line which is ignored by the other SOCs, so once we wired it correctly … 😀

      Reply

      • Steven Richardson
        Feb 15, 2021 @ 15:23:08

        Hi, can you confirm what you mean about wiring up the ethernet interrupt correctly? Did you take it to a GPIO or did you have to connect it directly to the ETH1_PHY_INTN?

        What sort of issues where you seeing?

        I’m having issues with the phy on my board getting:
        IPv4: martian source 255.255.255.255 from 192.168.1.1, on dev eth0
        [ 124.213105] ll header: 00000000: ff ff ff ff ff ff 38 d5 47 b9 c2 80 08 00

        Thanks

  2. domas
    Feb 05, 2021 @ 10:40:27

    Really nice OSHW projects comes from you. Suggestion: you should link your products to your product pages in the blog posts.

    Reply

  3. jonassmedegaard
    Feb 05, 2021 @ 13:43:00

    oh my – yes, I also immediately thought of Tx/Rx calibration and didn’t think of differences in SoC. Great you solved it, and thanks for sharing such details!

    Reply

  4. Diego
    Feb 06, 2021 @ 11:12:53

    What is the ECMF02 good for, as it’s in the ST schematic but not yours?

    Reply

  5. Adamo
    Feb 18, 2021 @ 19:59:47

    Great job guys!

    How much he STMP1-OLinuXino-LIME2 will be compatible with the A20-OLinuXino-LIME2? Connector/signal wise?
    Do you have any plan to maybe do a STMP1-OLinuXino-MICRO?

    Reply

  6. vcelak
    Mar 03, 2021 @ 16:00:00

    As per my checking in STM32CubeMX – it is not possible to have enabled USBH_HS2 + USB_OTG_HS at the same time as they use the same USB DP/DM pins… That makes sense why on demo board is HS1 with HUB and 2nd port as USB_OTG_HS. But maybe I didn’t check everything…

    Reply

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  13. Andrei B
    Jul 17, 2023 @ 03:17:52

    @Olimex: as you state in the thread KZS9031 require Interrupt. So the INT (ETH_MDINT) of the PHY is connected to PG0 (in your published schematic) that is not the dedicated MAC INT input that is PG12. For interrupt can be used any GPIO pin?

    Thanks and Most Appreciate your clarification.
    Best Regards,
    Andrei

    Reply

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