A64-OLinuXino Open Source Hardware board with 64-bit Cortex-A53 processor is in released

A64-OLinuXino-

A64-OLinuXino-22

A64-OLinuXino OSHW board is now released. Current revision is Rev.C.

Features are:

  • A64 Cortex-A53 64-bit SoC from Allwinner
  • AXP803 PMU with Lipo charger and step-up
  • 1 or 2GB or DDR3L @672 Mhz
  • 0 / 4 or 16GB of industrial grade eMMC
  • SPI Flash in SO8 package with hardware WP (not assembled)
  • USB-OTG and USB-HOST
  • HSIC connector (not assembled)
  • Gigabit Ethernet
  • BLE/WiFi module
  • HDMI and MIPI display connectors
  • microSD card
  • Debug console serial connector
  • Audio In and Out
  • LCD display connector
  • GPIO 40 pin connector (not assembled)
  • UEXT connector (not assembled)
  • 5V power jack
  • Dimensions: 90×62.5 mm

For the moment we have three models:

  • 1G0G with 1GB RAM, no Flash, no WiFi/BLE
  • 1G4GW with 1GB RAM, 4GB eMMC and WiFi/BLE
  • 2G16G-IND with 2GB RAM, 16GB eMMC with industrial grade components -40+85C

The optional connectors and SPI Flash etc may be assembled upon request for small fee.

A20-OLINUXINO-MICRO now available also in Industrial temperature grade -45+85C

A20-OLINUXINO-MICRO-EMMC-3

We are selling for some time already A20-OLinuXino-MICRO Rev.J where few things were improved:

  1. We changed the LAN PHY from Realtek to Microchip as latter is more reliable supplier for both commercial and industrial temperature components, we searched desperately Realtek PHY in industrial temperature grade but without success.
  2. We extended the input working voltage from 6-16VDC to 8-24VDC
  3. We changed the NAND Flash to eMMC (but old NAND style flash is still possible to assembly)

The Ethernet PHY change requires new patches on the Uboot and Linux images which are already uploaded.

TERES I Do It Yourself Open Source Hardware and Software Hacker’s friendly laptop is complete

teres

We are proud to announce that our TERES I laptop is complete. We have assembled units and now working on the software.

The building instructions are uploaded here and you can see that it’s pretty easy to build one yourself.

This weekend in Bruxell at FOSDEM we will have table in Hall AW where every one could touch and play with the very first built laptops.

All spare parts are uploaded at the web.

Hardware CAD files and Linux build scripts are on GitHub. TERES I is completely designed with KiCAD FOSS so everyone can download and learn, study, edit, modify.

Hardwarewise everything is OK and works, the software need some care to be completed, power supply management, Linux distribution, and few more details need attention, but we hope everything to be complete till Friday!

Final updates on A64-OLinuXino GMAC and eMMC, we are ready to launch production

A64-OLinuXino-1

We complete our test with Rev.B

Good news is that Gigabit interface works well with Micrel/Microchip PHY and result is real Gigabit bandwidth. A20 although having Gigabit interface can’t make more than 700 Mbit I guess this is related to A20 capability to handle the data from GMAC. With A64 the speed is  932Mbit i.e. very close to 1Gb:

root@A64-OLinuXino:~# iperf -s 
 ------------------------------------------------------------ 
 Server listening on TCP port 5001 
 TCP window size: 85.3 KByte (default) 
 ------------------------------------------------------------ 
 [  4] local 10.0.0.4 port 5001 connected with 10.0.0.1 port 41144 
 [ ID] Interval       Transfer     Bandwidth 
 [  4]  0.0-10.0 sec  1.09 GBytes   932 Mbits/sec

 

For eMMC we followed the advice to make it dual voltage 3.3V and 1.8V with aim to have faster transfers and we implemented it in the hardware, but the tests show that transfer is same even at 1.8V is a bit lower. I don’t know if this is due to lame software settings we do in the eMMC drivers, or just the eMMC we use have same transfer on both voltages (we check datasheet and the eMMC we use have same speed quoted on both voltages), so this may be useless for our eMMC chip:

eMMC clock: 52 Mhz

eMMC@3.3V 
root@A64-OLinuXino:/home/olimex# dd if=/dev/zero of=/mnt/output conv=fdatasync bs=384k count=1k; rm -f /mnt/output 
1024+0 records in 
1024+0 records out 
402653184 bytes (403 MB, 384 MiB) copied, 33.0437 s, 12.2 MB/s 
 
eMMC@1.8V 
root@A64-OLinuXino:/home/olimex# dd if=/dev/zero of=/mnt/output conv=fdatasync bs=384k count=1k; rm -f /mnt/output 
1024+0 records in 
1024+0 records out 
402653184 bytes (403 MB, 384 MiB) copied, 37.9408 s, 10.6 MB/s 
 
SDMMC clock: 40MHz 
 
SDMMC@3.3V 
root@A64-OLinuXino:/home/olimex# dd if=/dev/zero of=/tmp/output conv=fdatasync bs=384k count=1k; rm -f /tmp/output 
1024+0 records in 
1024+0 records out 
402653184 bytes (403 MB, 384 MiB) copied, 41.1578 s, 9.8 MB/s 
 

With SDMMC as we don’t know what SD card will be inserted the clock is set to default 40Mhz.

After re-checking that everything works, we make last cosmetic changes to audio part we noticed in the last moment and will run Rev.C in production.

A64-OLinuXino-eMMC rev.B OSHW 64 bit ARM development board prototypes are testing

A64-OLinuXino-1

A64-OLinuXino-2

What you see is our improved REV.B of A64-OLinuXino. What’s new:

  • Gigabit PHY is now KSZ9031 from MICROCHIP/MICREL which allow board to be produced in both commercial and industrial grade!
  • DDR3 is now DDR3L for lower power
  • we add SPI flash footprint U12
  • Audio input now is jumper selectable between LINE-IN and MIC-IN
  • eMMC now can work on software selectable voltage 3.3V or 1.8V which would allow faster speeds
  • status LED is attached to port PE17
  • size 90×60 mm

Now we do final software tests and if everything is OK we will run production.

 

Free Electrons add mainline Linux kernel support for the A13 Allwinner VPU

video

Posted today on Free Electrons blog.

19 years old intern in Free Electrons took the Cedrus reverse engineering of Allwinners proprietary CedarX video driver who is around since mid 2014 and made patches for mainline Linux kernel.

I’m sure we use these since they were made first available and they are build in our images, so I’m really puzzled why they have made their way to mainline just now and not earlier?

Isn’t it time Linux-Sunxi community to stop working on kernel fork and start to send all development and patches upstream like Rockchip developers do already for 2 years?

Looking at mainline kernel Rockchip has way better support now than Allwinner although Linux-Sunxi community to seem many times bigger than Rockchip community.

Rockchip devices are in many Chromebooks and Google push them to send all their work upstream to latest kernels.

None of newer Allwinner chips found it’s place in Chromebooks and this is the problem, for Android kernel 3.10 is enough and they will not move from it, neither they learn (or are capable to generate quality code) to upstream all work they do.

This is pitty as since A10/A20 we can’t see anything which to beat Rockchip as productivity.

RK3288 is mainline and although Cortex-A17 still faster than any chip Allwinner have.

Now Rockchip work to release their new super duper RK3399 (2x Cortex-A72 and 4x Cortex-A53) and again they upstream code before even selling the chip.

With two USB3 hosts this chip is good candidate for next OLinuXino 🙂

 

EDIT1: after the posting there were interesting comments from  Chen-Yu Tsai (a.k.a. wens213) who point me that what Free Electrons did is not simple commit to already existing project but did from scratch v4l2 mem-2-mem codec driver! So I appologise for the underestimated efforts!

EDIT2: I admit that what I wrote about Linux-Sunxi repository was about Kernel 3.4 which I was using two years ago and which was developed “wild west” style. I was assuming as the repositories are still there this continues, but I was wrong!

Our boards are with A10/A13/A20 and have mainline support, so I didn’t followed closely what happens with Linux-Sunxi lately.

Chen-Yu and Siarhei explained that this repo is kept there for historical reasons and now all development is focused to upstream too! Good to know 🙂

At Linux-Sunxi there is very clear table about what is done ( light green) and on what is working (ornge)

maniline

 

 

A64-OLinuXino update, the Rev.B design will be possible to produce in industrial grade -40+85C, dual voltage eMMC 3.3/1.8V

А64-1cut

A64-OLinuXino first prototypes were made in March and lot of people wonder why we do not release for mass production this board yet 🙂 so we got lot of e-mails and I see there is need for blog post with update.

Here is the recap from the first prototypes:

  • RAM memory works at amazing 667Mhz clock much more than A20 and other boards and the board works stabile under stress tests for many hours
  • eMMC works fine, we didn’t test NAND Flash due to the missing Linux support probabbly this will stay just as option and we will assembly the boards with eMMC which is faster, better and in industrial temperature
  • Linux Kernel is 3.10.65 and works fine, we managed to run all peripherials
  • Audio In and Out is working
  • HDMI is working
  • USB host is working
  • USB-OTG is working
  • WiFi+BT is working
  • MIPI interface – no display which to use to test, any ideas?
  • HSIC interface – don’t know how to test, any ideas?
  • LiPo charger and step up works
  • LCD works
  • Ethernet Gigabit interface works just in master mode

While we worked on this board we found new PHY from Microchip which can be ordered in industrial temperature, we tested it with A20 and it works fine (we already have LIME2 version with it which is on prototype), so we decided to re-design the Ethernet part of A64-OLinuXino with it, this will allow us to produce A64-OLinuXino in industrial temperature grade -40+85C.

Another major upgrade for Rev.B is around eMMC interface, we re-designed it as per your feedback to be possible to work on programmable 3.3V and 1.8V thus to allow faster transfers.

Rev.B is routed at 90% we need 1 more week to complete it and run new prototypes. If everything goes smoothly we will be ready by end of the month.

 

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